NAME	PMOVE -- Move from or to PMMU registers (PRIVILEGED)
SYNOPSIS	PMOVE MMU-reg,<ea> PMOVE <ea>,MMU-reg PMOVEFD <ea>,MMU-reg Size = (Word, Long, Quad).
FUNCTION	This instruction is used to read or write PMMU registers. Transfert on CRP or SRP is for a Quadruple word (64 bits), TC, TT0, TT1 one's is for a Long word, and MMUSR one's is for a Word. PMOVEFD instruction does a move with invalidation or not of PMMU cache. If FD bit is set in the instruction, the ATC isn't invalidated; if FD bit is cleared, ATC is invalidated. If value loaded in CRP or SRP follows to a not valid descriptor, the value is loaded but an exception of configuration error of PMMU is generated. For the TC register, a checking  on fields PS, IS, and TIx is made; if there's error on the total of mentioned bits, operand is loaded but an exception of configuration error of PMMU is generated. MMUSR isn't affected by those transferts, else it is placed in destination!!
FORMAT	For CRP, SRP, TC registers: PMMU-reg field specifies PMMU register: 000 -> TC 010 -> SRP 011 -> CRP   <ea> 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 1 1 1 0 0 0 0 0 0 MODE REGISTER 0 1 0 MMU-reg R/W FD 0 0 0 0 0 0 0 0 For TT0, TT1, registers: PMMU-reg field specifies PMMU register: 010 -> TT0 011 -> TT1 FD bit: allows or not ATC invalidation: 0 -> ATC invalidated. 1 -> ATC NOT invalidated.   <ea> 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 1 1 1 0 0 0 0 0 0 MODE REGISTER 0 0 0 MMU-reg R/W FD 0 0 0 0 0 0 0 0 For MMUSR register:   <ea> 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 1 1 1 0 0 0 0 0 0 MODE REGISTER 0 1 1 0 0 0 R/W 0 0 0 0 0 0 0 0 0 R/W field indicates type of access used for research: 0 -> Memory to PMMU register. 1 -> PMMU register to memory.
REGISTER	<ea> specifies memory address, allowed addressing modes are: Addressing Mode Mode Register Dn - - An - - (An) 010 No reg. An (An)+ - - -(An) - - (d16,An) 101 No reg. An (d8,An,Xi) 110 No reg. An (bd,An,Xi) 110 No reg. An ([bd,An,Xi]od) 110 No reg. An ([bd,An],Xi,od) 110 No reg. An Addressing Mode Mode Register Abs.W 111 000 Abs.L 111 001 (d16,PC) - - (d8,PC,Xi) - - (bd,PC,Xi) - - ([bd,PC,Xi],od) - - ([bd,PC],Xi,od) - - #data - -
RESULT	Not affected.

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